diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 682d4e7..69567db 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -60,6 +60,7 @@
 
 config TARGET_MPC8540ADS
 	bool "Support MPC8540ADS"
+	select ARCH_MPC8540
 
 config TARGET_MPC8541CDS
 	bool "Support MPC8541CDS"
@@ -193,6 +194,9 @@
 config ARCH_MPC8536
 	bool
 
+config ARCH_MPC8540
+	bool
+
 config ARCH_MPC8544
 	bool
 
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index cabf64c..871935d 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -293,7 +293,7 @@
 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
 /* Everything after the first generation of PQ3 parts has RSTCR */
-#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_MPC8541) || \
     defined(CONFIG_MPC8555) || defined(CONFIG_MPC8560)
 	unsigned long val, msr;
 
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index be03e01..55d1431 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -625,7 +625,7 @@
 		 * for four times the clock divider values.
 		 */
 		lcrr_div *= 4;
-#elif !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \
+#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_MPC8541) && \
     !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560)
 		/*
 		 * Yes, the entire PQ38 family use the same
@@ -681,7 +681,7 @@
 	 * for that SOC. This information is taken from application note
 	 * AN2919.
 	 */
-#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_MPC8541) || \
 	defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555) || \
 	defined(CONFIG_P1022)
 	gd->arch.i2c1_clk = sys_info.freq_systembus;